A reconfigurable processing device typically refers to an electronic device that can dynamically change its internal configuration during runtime to change the way input signals are processed. One example of such a device is a reconfigurable microprocessor. Another example of such a device is a reconfigurable field programmable gate array (FPGA). An FPGA is a form of programmable logic device (PLD) that includes of an array of logic that can be connected in a variety of ways to perform certain processing functions. Instead of being hardwired to operate in only one functional mode, a reconfigurable FPGA typically can be loaded with a configuration that defines how the logic is connected. A reconfigurable FPGA includes two types of functional elements: configurable interconnect logic and volatile memory (e.g., static random access memory (SRAM)), that stores the loaded configuration. In operation, the reconfigurable FPGA configures its programmable interconnect logic using the configuration data in the memory layer. When a new configuration is loaded into the memory layer, the reconfigurable FPGA reconfigures its programmable logic using the newly-loaded configuration.
Techniques have been described for monitoring the internal aspects of the reconfigurable FPGA for fault detection. For example, a technique involves continuously reading the volatile memory elements to verify that the configuration is not corrupted. Some techniques also include reconfiguring the FPGA when such an internal inspection discovers a fault in either the configurable logic element or the volatile memory element. See for example U.S. Pat. No. 6,526,559, which describes a method for creating circuit redundancy in programmable logic devices.